1. Field of the Invention
The invention is directed to fabrication of electronic devices and more particularly to the fabrication of superconducting electronic devices such as Josephson junctions.
2. Description of the Prior Art
Superconducting integrated circuits (ICs) based on Josephson junctions offer the possibility of operation at clock frequencies of 100 GHz or above. In order to achieve this on an industrial scale, it is necessary to decrease junction size toward submicron dimensions, and increase junction density, so that chips with many thousands of Josephson junctions can be reliably manufactured. The key parameter is the critical current Ic of a junction, which must be defined to within about 1% of design specifications, without defects.
The most reliable junction fabrication technology is based on the superconductor niobium (Nb), and in particular on a trilayer structure based on an ultrathin insulating “tunnel barrier” layer of aluminum oxide (AlOx), 1-2 nm thick, sandwiched between two layers of Nb. This provides a precise critical current density of the junction Jc=Ic/A, where A is the junction area. If the microlithography defines A accurately, without damaging the tunnel barrier layer, then Ic is also accurately defined. This becomes increasingly difficult as the dimensions of the junction decrease. Applications of standard microlithography techniques may produce junctions with edge damage that can reduce junction quality and yield.
Current Nb IC technology also incorporates multiple layers of superconducting Nb wiring to bias and connect the Josephson junctions. This requires high-quality insulating layers between Nb layers, which are typically provided by silicon dioxide (SiO2). SiO2 is of course a standard material in semiconductor technology, and standard procedures for fabricating high-quality films are available.
An established technique in the prior art to improve junction yield is the use of selective anodization (Meng 2003, Kerber 2006). Anodization is an electrolytic process of surface oxidation that passivates all exposed Nb and Al surfaces, preventing damage in subsequent lithographic steps. However, this has not completely eliminated defects and related yield problems. It is essential to solve these problems to advance to the next stage of circuit integration.